Nonvolatile memory controller with two-stage error correction technique for enhanced reliability

摘要

A nonvolatile memory controller generates an error correction code for each data unit in a data stripe and generates a parity unit based on the data units of the data stripe. If a data unit of the data stripe has a number of data bit errors not exceeding the error correction capacity of the nonvolatile memory controller, the nonvolatile memory controller corrects any data bit errors in the data unit based on the error correction code of the data unit. Otherwise, if a data unit of the data stripe has a number of data bit error exceeding the error correction capacity of the nonvolatile memory controller, the nonvolatile memory controller recovers the data unit based on the other data units of the data stripe and the parity unit.