发明名称 Multiplication-based reed-solomon encoding architecture
摘要 Circuitry for generating a first number of Reed-Solomon check symbols from a second number of input data symbols includes storage for a plurality of generator coefficients, a plurality of multipliers, each of the multipliers having a data symbol input, and a coefficient input connected to the storage, and having an output. The circuitry also includes accumulator circuitry that accumulates outputs of the multipliers to generate the check symbols. The circuitry can be provided in fixed logic, or configured in a programmable integrated circuit device, such as a programmable logic device.
申请公布号 US8707143(B1) 申请公布日期 2014.04.22
申请号 US201113158965 申请日期 2011.06.13
申请人 LANGHAMMER MARTIN;ALTERA CORPORATION 发明人 LANGHAMMER MARTIN
分类号 H03M13/03;G11B20/18;H03M13/15;H04L1/00 主分类号 H03M13/03
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