发明名称 |
Process flow to reduce hole defects in P-active regions and to reduce across-wafer threshold voltage scatter |
摘要 |
Disclosed herein is a method of forming a semiconductor device. In one example, the method comprises performing at least one etching process to reduce a thickness of a P-active region of a semiconducting substrate to thereby define a recessed P-active region, performing a process in a process chamber to selectively form an as-deposited layer of a semiconductor material on the recessed P-active region, wherein the step of performing the at least one etching process is performed outside of the process chamber, and performing an etching process in the process chamber to reduce a thickness of the as-deposited layer of semiconductor material. |
申请公布号 |
US8703551(B2) |
申请公布日期 |
2014.04.22 |
申请号 |
US201113102680 |
申请日期 |
2011.05.06 |
申请人 |
KRONHOLZ STEPHAN;OTT ANDREAS;GLOBALFOUNDRIES INC. |
发明人 |
KRONHOLZ STEPHAN;OTT ANDREAS |
分类号 |
H01L21/00;H01L21/20;H01L21/302;H01L21/36;H01L21/8228;H01L21/8238;H01L21/84 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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