发明名称 SEMICONDUCTOR DEVICE MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To simply determine good and bad of electrical connection between a plurality of leads of a semiconductor device and a plurality of electrode pads of a mounting board in a short time when the semiconductor device is mounted on a top face of the mounting board.SOLUTION: A semiconductor device manufacturing method comprises: forming a plating film PF on one lateral faces of a plurality of leads LE of a semiconductor device SD1, the lateral faces being exposed from a resin encapsulated body MO to make it easy to form a plurality of solder materials CS for respectively connecting the plurality of leads LE of the semiconductor device SD1 with a plurality of electrode pads EP of a mounting board MB on the one lateral faces of the plurality of leads LE of the semiconductor device SD1, the lateral faces being exposed from the resin encapsulated body MO; and determining good and bad of electrical connection between the plurality of leads LE of the semiconductor device SD1 and the plurality of electrode pads EP of the mounting board MB depending on an intensity of reflected light from fillets FL of the solder materials CS formed on the one lateral faces of the plurality of leads LE of the semiconductor device SD1, the lateral faces being exposed from the resin encapsulated body MO.
申请公布号 JP2014072236(A) 申请公布日期 2014.04.21
申请号 JP20120215038 申请日期 2012.09.27
申请人 RENESAS ELECTRONICS CORP 发明人 FURUKAWA KOJI;SATO YOSHIHIRO;GONDA KEIJI
分类号 H01L23/50;H01L21/56 主分类号 H01L23/50
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