发明名称 METHODS OF EXTRACTING FIN HEIGHTS AND OVERLAP CAPACITANCE AND STRUCTURES FOR PERFORMING THE SAME
摘要 A first test structure includes a first isolation region, a first gate electrode over the first isolation region, a first and a second semiconductor fin, and a first contact plug over the first and the second semiconductor fins. A second test structure includes a second isolation region, a second gate electrode over the second isolation region, a third semiconductor fin and a dielectric fin, and a second contact plug over the third semiconductor fin. The first, the second, and the third semiconductor fins and the dielectric fin have substantially a same fin height. A method includes measuring a first capacitance between the first gate electrode and the first contact plug, measuring a second capacitance between the second gate electrode and the second contact plug, and calculating the same fin height from a capacitance difference between the second capacitance and the first capacitance.
申请公布号 KR101386772(B1) 申请公布日期 2014.04.21
申请号 KR20120052072 申请日期 2012.05.16
申请人 发明人
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
代理机构 代理人
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