发明名称 CLASS D AMPLIFICATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To cancel an output offset voltage dependent on an offset voltage of a fully differential operational amplifier and relative variations between input resistors and between feedback resistors at a start and a stop.SOLUTION: A positive side variable current source 15p for adding a positive side adjustment signal to a positive side input signal and a negative side variable current source 15n for adding a negative side adjustment signal to a negative side input signal are disposed. The positive side variable current source 15p and the negative side variable current source 15n are controlled such that a phase difference between a positive side PWM modulation signal V3p and a negative side PWM modulation signal V3n becomes zero to implement output offset voltage cancellation.
申请公布号 JP2014072613(A) 申请公布日期 2014.04.21
申请号 JP20120215761 申请日期 2012.09.28
申请人 NEW JAPAN RADIO CO LTD 发明人 ENDO YASUYUKI
分类号 H03F1/00;H03F3/217 主分类号 H03F1/00
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