| 摘要 |
Disclosed are a pillar type vertical dram cell and a manufacturing method thereof. The pilla type vertical dram cell comprises: a semiconductor substrate; a joint wiring formed on the semiconductor substrate; a gate wiring formed on the joint wiring; a channel pillar formed through the gate wiring and in which a channel area on the channel pillar layer can be formed on the inner side while the inner side is buried in the channel pillar layer; and a storage pillar buried as a storage electrode layer, in which a dielectric layer is formed on the inner side, and which is formed on the channel pillar. The channel area of the channel pillar is an area where a channel electrically connecting the storage electrode layer of the storage pillar and the joint wiring according to the voltage applied to the gate wiring can be formed. In the pillar type vertical dram cell of the present invention, a cell transistor is formed vertical to the semiconductor substrate in a pillar type, and the pillar type cell capacitor is formed on the cell transistor. By using the pillar type vertical dram cell, adequate amount of capacitor can be secured, and the size of layout can be reduced. Also, as the cell transistor is arranged to form a channel area on the channel pillar layer buried inside the channel pillar which is formed through the gate wiring, the amount of leaked current can be highly reduced. |
