发明名称 BOUNDED BIAS CIRCUIT WITH EFFICIENT VT-TRACKING FOR HIGH VOLTAGE SUPPLY/LOW VOLTAGE DEVICE
摘要 Disclosed is a device and method for providing a bounded bias voltage with improved Process Voltage Temperature (PVT) adjustment. An embodiment may include a bias_n generation circuit that adjusts a bias_n voltage for PVT as a function of two bias_n NMOS transistors/diodes and a bias_p generation circuit that adjusts a bias_p voltage for PVT as a function of two bias_p PMOS transistors/diodes. An embodiment may further include a PVT adjusted bounded bias voltage circuit comprised of a NMOS transistor with the bias_n voltage at the gate and a PMOS transistor with the bias_p voltage at the gate such that a common connection between the NMOS and PMOS transistors generates a bounded bias voltage adjusted for PVT as a function of two body biased voltages (bias_n/bias_p). The bounded bias voltage may be used to provide a low supply voltage to a low voltage device using an available high voltage supply.
申请公布号 US2014103991(A1) 申请公布日期 2014.04.17
申请号 US201213649915 申请日期 2012.10.11
申请人 LSI CORPORATION 发明人 IYENGAR ANUROOP;KUMAR PANKAJ
分类号 G05F3/02 主分类号 G05F3/02
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