发明名称 LOGIC CIRCUIT FOR THE GATHERING OF TRACE DATA
摘要 A logic circuit comprises a plurality of functional logic units each having an independent clock signal and a trace bus for carrying trace data. A trace gathering logic unit collects trace data from the functional logic units, the trace gathering logic unit having a clock signal independent of the clock signals of the functional logic units and a trace bus for receiving trace data from the functional logic units; multiplexing logic for multiplexing portions of trace data from different functional logic units onto the trace bus of the trace gathering logic unit; and, synchronization logic coupled to the multiplexing logic for communicating trace data from the functional, logic units to the trace gathering logic unit based on the clock signal of the trace gathering logic unit, the synchronization logic comprising detection logic when valid trace data from the functional logic units is available for placing on the trace bus of the trace gathering logic unit, and signaling logic coupled to the detection logic for signaling to the trace gathering logic unit that valid trace data is on the trace bus.
申请公布号 US2014108872(A1) 申请公布日期 2014.04.17
申请号 US201314054539 申请日期 2013.10.15
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 PALMER MICHAEL J.;WONG KEVIN
分类号 G06F11/34 主分类号 G06F11/34
代理机构 代理人
主权项
地址