| 摘要 |
Biasing circuit for providing a supply voltage (Vdd) for an inverter based circuit. The biasing circuit is provided on a same die as the inverter based circuit, and includes a first shorted inverter circuit (T1, T2) and a second shorted inverter circuit (T3, T4). The first shorted inverter circuit (T1, T2) is connected in parallel to a series configuration of the second shorted inverter circuit (T3, T4) and a reference impedance (R). The first shorted inverter circuit (T1, T2) and second shorted inverter circuit (T3, T4) have different transistor geometries. A control circuit (T5-T11) is connected to the first shorted inverter circuit (T1, T2) and the second shorted inverter circuit (T3, T4), and supplied with a main supply voltage (Vdd). The control circuit (T5-T11) is arranged such that an equal current flows through the first shorted inverter circuit (T1, T2) and second shorted inverter circuit (T3, T4). |
