发明名称 METALLIZATION SCHEME FOR INTEGRATED CIRCUIT
摘要 For multi-level interconnect metallization, each metal level maintains a parallel line arrangement within a region, and the lines of each adjacent metal level are orthogonal or otherwise cross with one another. Vertical shunting among levels for routing in different directions employs short paddles that stay within the parallel scheme, and multiple paddles within a region at the same metal level can be co-linear. Parallel lines in the same metal level can be rotated with respect to one another in adjacent regions, for example to better interface with driver circuitry with orthogonal orientations in the different regions.
申请公布号 US2014104968(A1) 申请公布日期 2014.04.17
申请号 US201213651326 申请日期 2012.10.12
申请人 MICRON TECHNOLOGY, INC. 发明人 FLORES EVERARDO TORRES;CASTRO HERNAN A.;HIRST JEREMY M.
分类号 G11C8/08;G11C7/00;H01L23/52;H01L25/00 主分类号 G11C8/08
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