| 摘要 |
PROBLEM TO BE SOLVED: To reduce source/drain resistance of a buffer circuit.SOLUTION: A semiconductor device comprises: power source wiring VDD and grounding wiring VSS which extend in an X direction; a P-type logic circuit region 100P arranged to overlap the power source wiring VDD; an N-type logic circuit region 100N arranged to overlap the grounding wiring VSS; and a P-type buffer circuit region 200P and an N-type buffer circuit region 200N which are arranged to overlap the power source wiring VDD and the grounding wiring VSS. A boundary 101 between the P-type logic circuit region 100P and the N-type logic circuit region 100N extends in an X direction and a boundary 201 between the P-type buffer circuit region 200P and the N-type buffer circuit region 200N extends in a Y direction. Because of this, the buffer circuit regions 200P, 200N can sufficiently utilize a cell width thereby to enable use of a layout where source/drain resistance can be decreased. |
