发明名称 Concurrent and iterative arithmetic operation by a processing unit
摘要 <p>An arithmetic operation, such as an SRT computation of a division, square root, addition, subtraction or multiplication, in a data processing unit (216), preferably by iterative digit accumulations, is proposed. An approximate result of the arithmetic operation is computed iteratively. Concurrently, at least two supplementary values of the approximate result of the arithmetic operation are computed, and the final result selected from one of the values of the approximate result and the at least two supplementary values of the arithmetic operation depending on the results of the last iteration step. A multiplexing unit may select the final result. Iteration may use accumulating digit values concatenated to previous results using a radix.</p>
申请公布号 GB2506871(A) 申请公布日期 2014.04.16
申请号 GB20120018112 申请日期 2012.10.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHRISTOPHE LAYER;SILVIA MELITTA MUELLER;MICHAEL KROENER;KERSTIN SCHELM
分类号 G06F7/544;G06F7/49 主分类号 G06F7/544
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