| 摘要 |
<p>An array substrate for a liquid crystal display, according to an aspect of the present invention, comprises: a substrate on which a gate electrode and a gate pad are formed; a gate insulating layer formed on the gate electrode and the gate pad; an active layer formed in an area corresponding to the gate electrode on the gate insulating layer; a first stepped portion formed in a partial area corresponding to the gate pad on the gate insulating layer and an etching preventing layer formed on the active layer; a second stepped portion formed on the first stepped portion and a data line formed on the etching preventing layer; a first passivation layer formed on the data line and the second stepped portion; a second passivation layer formed on the first passivation layer, and formed in an area except for an area partially exposing the gate pad and an area corresponding to the gate electrode; and a metal layer formed on the second passivation layer, connected to the data line through a contact hole exposing the data line, and connected to the gate pad through a contact hole exposing the gate pad. [Reference numerals] (AA) TFT area; (BB) Pad area</p> |
