发明名称
摘要 A semiconductor memory device (and control method therefor) includes a plurality of word lines, a plurality of bit lines, a plurality of memory cells arranged at intersections of the word lines and the bit lines, a word driver that selects any one of the word lines, a plurality of sense amplifiers connectable to any of the bit lines, a sense-amplifier starting circuit that sequentially starts the sense amplifiers in response to a request of consecutive read operations to the memory cells connected to a predetermined word line, in a state that the predetermined word line is selected by the word driver, and an address determining circuit that temporarily stops an operation of the sense-amplifier starting circuit in response to a request of consecutive read operations to a same memory cell connected to a predetermined word line, in a state that the predetermined word line is selected by the word driver.
申请公布号 JP5474313(B2) 申请公布日期 2014.04.16
申请号 JP20080115707 申请日期 2008.04.25
申请人 发明人
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
主权项
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