| 摘要 |
In a wide-gap semiconductor complex diode, p + -anode layers (3a, 3b) are epitaxial-grown on an n - -drift layer (2) and are processed into a mesa and one or more pn-junction(s) are disposed. Schottky barriers (7a, 7b) are disposed on mesa bottoms away from pn-main junctions (5a, 5b). Thereby, faults that are generated in both junctions when the junctions are formed are reduced, faults that are generated in the Schottky barriers (7a, 7b) due to a stress by wire-bonding are reduced, and the effects of the faults are reduced. A p-fused field limiting layer (13) having a concentration lower than that of the p + -anode layers (3a, 3b) is disposed between both junctions, contacting both junctions. Thereby, the generation of the faults is suppressed and a high withstand voltage is realized. The Schottky barriers (7a, 7b) are disposed in an outermost peripheral portion of both junctions and the p-fused field limiting layer (13) is disposed connected to the junctions, whereby accumulated carriers remaining under the pn-junctions (5a, 5b) are efficiently discharged without degrading the high withstand voltage and thus, a reverse recovery time period and a reverse recovery current are reduced. |
