发明名称 Continuous-time incremental analog-to-digital converter
摘要 In accordance with embodiments of the present disclosure, a continuous-time incremental analog-to-digital converter (ADC) may include a plurality of resettable integrators and a feed-in gain element. Each integrator may be configured to convert a sum of signals received at its input to a signal indicative of an integral over time of the sum of signals. The plurality of integrators may include a first-stage integrator configured to receive at its input the baseband signal and a final-stage integrator configured to produce at its output a final-stage analog signal. The plurality of integrators may be arranged in a cascade configuration such that an output of each of the plurality of integrators other than the final-stage integrator is coupled to the input of a subsequent integrator. The feed-in gain element may be coupled between the input of the first-stage integrator and the input of another integrator of the plurality of integrators.
申请公布号 US8698664(B2) 申请公布日期 2014.04.15
申请号 US201213363884 申请日期 2012.02.01
申请人 OLIAEI OMID;RAKERS PATRICK L.;INTEL IP CORPORATION 发明人 OLIAEI OMID;RAKERS PATRICK L.
分类号 H03M1/12 主分类号 H03M1/12
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