发明名称 Output slew rate control
摘要 This document discusses, among other things, output slew rate control. Methods and structures are described to provide slew rate control of an output driver circuit such as a DRAM output driver on a die. A selectable combination of series coupled transistors are configured as a parallel array of complementary inverter pairs to provide a divided voltage to a calibrator. The calibrator is configured to respond to a differential voltage to adjust the divided voltage such that the differential voltage is forced to zero. The calibrator outputs a plurality of discrete signals from an up/down counter to toggle the individual transistors of the parallel array to increase and decrease a collective current. In some embodiments, transistor channel currents are modulated to step-adjust a voltage based on a ratio associated with a static resistance. In various embodiments, the divided voltage is an analog voltage based on a resistance associated with trim circuitry.
申请公布号 US8698520(B2) 申请公布日期 2014.04.15
申请号 US201213418078 申请日期 2012.03.12
申请人 MEI SHIZHONG;MICRON TECHNOLOGY, INC. 发明人 MEI SHIZHONG
分类号 H03K19/094 主分类号 H03K19/094
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