发明名称 |
DIGITAL ADAPTIVE CIRCUIT NETWORK AND METHOD FOR PROGRAMMABLE LOGIC DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To provide a digital adaptive circuit network and a method for a programmable logic device.SOLUTION: A method controls equalization of an incoming data signal. The method comprises steps of: detecting bits having two consecutive different values out of the data signal; determining whether transition in the incoming data signal between the two bits is relatively low in speed or relatively high in speed; and increasing the equalization of the incoming data signal when the transition is relatively low in speed. |
申请公布号 |
JP2014064328(A) |
申请公布日期 |
2014.04.10 |
申请号 |
JP20130268773 |
申请日期 |
2013.12.26 |
申请人 |
ALTERA CORP |
发明人 |
WONG WILSON;CHAN DORIS PO CHING;SHUMARAYEV SERGEY;MAANGAT SIMARDEEP;HOANG TIM TRI;LAI TIN H;TRAN THUNGOC M |
分类号 |
H04L25/03;H04B3/04 |
主分类号 |
H04L25/03 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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