| 摘要 |
PROBLEM TO BE SOLVED: To arrange a layout of a pad lead-out part approximately at the center of an I/O part in a PAD on I/O cell structure to reduce a layout area of a semiconductor chip.SOLUTION: A semiconductor integrated circuit device comprises: an I/O part 5 including a transistor 8 laid out at a position closest to a peripheral part of a semiconductor chip, a resistor 12 laid out above the transistor 8, diodes 10, 11 laid out above the resistor 12 and a transistor 9 laid out above the diodes 10, 11; and a logic part 6 laid out above the transistor 9 across a pad lead-out part 5a formed in a metal wiring layer, for example. With this configuration, since a pad 2 to a drain of the transistor 9 can be included in the same node, the pad lead-out part 5a can be laid out approximately at the center of the I/O part 5. |
