发明名称 TEST METHOD AND TEST ARRANGEMENT
摘要 A test method in accordance with one or more embodiments may include: providing a semiconductor device to be tested, the semiconductor device including at least one device cell, the at least one device cell having at least one trench, at least one first terminal electrode region and at least one second terminal electrode region, at least one gate electrode, and at least one additional electrode disposed at least partially in the at least one trench, wherein an electrical potential of the at least one additional electrode may be controlled separately from electrical potentials of the at least one first terminal electrode region, the at least one second terminal electrode region and the at least one gate electrode; and applying at least one electrical test potential to at least the at least one additional electrode to detect defects in the at least one device cell.
申请公布号 US2014097863(A1) 申请公布日期 2014.04.10
申请号 US201213647480 申请日期 2012.10.09
申请人 INFINEON TECHNOLOGIES AG 发明人 ZUNDEL MARKUS;HIRLER FRANZ;NELLE PETER
分类号 G01R31/26 主分类号 G01R31/26
代理机构 代理人
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