发明名称 DATA PROCESSING CIRCUIT AND SOLID STATE IMAGING DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a data processing circuit and a solid state imaging device that shorten a data processing time.SOLUTION: The data processing circuit includes: a latch section 101 including n latch unit groups 1011 (n is an integer that is a power of two) having the same number of multiple latch units 11 each for outputting an output signal holding a state of a clock signal of a corresponding phase of a multiphase clock comprising clock signals of a plurality of phases sequentially shifted at predetermined constant intervals; a data selection section 102 for acquiring the output signal output from at least one latch unit, and selecting a latch unit group holding the states of clock signals of a plurality of consecutive phases to be used for generation of a digital signal; and a digital generation section 104 for digitizing a phase state of the multiphase clock at the timing of input of a latch clock to generate the digital signal on the basis of the respective output signals output from the latch units in the selected latch unit group.
申请公布号 JP2014064243(A) 申请公布日期 2014.04.10
申请号 JP20120209541 申请日期 2012.09.24
申请人 OLYMPUS CORP 发明人 KUSANO YOSUKE
分类号 H03M1/50;H04N5/378 主分类号 H03M1/50
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