STACK TYPE SEMICONDUCTOR PACKAGE AND METHODS FOR FABRICATING THE SAME

摘要

The present invention relates to a laminated semiconductor package and a manufacturing method thereof. The laminated semiconductor package comprises a lower package; an upper package; and a via contact hole. The lower package comprises a printed circuit board which comprises a first circuit pattern, a first semiconductor chip which is mounted on the printed circuit board to be electrically connected to the first circuit pattern, and a first cover-lay layer which is formed on the printed circuit board to expose a part of the first circuit pattern. The upper package comprises a second circuit pattern which is the upper package laminated on the lower package with a non-conductive adhesive layer and which is formed on the adhesive layer, a second semiconductor chip which is mounted on the adhesive layer to be electrically connected to the second circuit pattern, and a second cover-lay layer which is formed on the adhesive layer to expose a part of the second circuit pattern. The via contact hole penetrates the adhesive layer in order that the first circuit pattern is electrically connected to the second circuit pattern.