发明名称 USE OF A JFET AS A FAILSAFE SHUTDOWN CONTROLLER
摘要 Various embodiments disclose methods and systems for controlling operation of a regulator controller integrated circuit. The regulator controller integrated circuit may include a run input and a voltage supply input. A voltage supply, having an on state and an off state, may be coupled with the voltage supply input of the regulator controller integrated circuit. A JFET that has a source, a drain, and a gate may be present. The source of the JFET may be coupled with electrical ground. The drain of the JFET may be coupled with the run input of the regulator controller integrated circuit. The gate of the JFET may be coupled with the voltage supply. Such embodiments may disable a regulator unless a supply voltage is present without requiring a supply voltage for control circuitry.
申请公布号 WO2012087615(A3) 申请公布日期 2014.04.10
申请号 WO2011US64202 申请日期 2011.12.09
申请人 ICC-NEXERGY, INC. 发明人 SCHNEIDER, LON
分类号 G05F1/613 主分类号 G05F1/613
代理机构 代理人
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