| 摘要 |
PROBLEM TO BE SOLVED: To provide a manufacturing method of a vertical transistor which can also inhibit decrease in quick response by decrease in parasitic capacitance.SOLUTION: In a manufacturing method of a vertical transistor, a substrate 1 is soaked in an organic solvent such as toluene after the conductor layer 12 is formed. By doing this, a soluble film 10 dissolves in the organic solvent and a part of the conductor layer 12, which is formed on the soluble film 10, is removed (lifted off) and only parts of the conductor layer 12, which are formed on lateral faces of a rib 2, are left. For this reason, a gate electrode 3 does not reach a state of being opposite to a bottom electrode layer 6 and a top electrode layer 7. Accordingly, different from a structure in the past in which a gate electrode is formed a lateral face and a top face of a salient to a bottom face of a recess, parasitic capacitance is not generated between the gate electrode 3 and a source electrode or a drain electrode. Further, decrease in quick response can be inhibited by obtaining a large current density, and in addition, enabling decrease in parasitic capacitance. |
