| 摘要 |
A coherency controller, such as one used within a system-on-chip, is capable of issuing different types of snoops to coherent caches. The coherency controller chooses the type of snoop based on the type of request that caused the snoops or the state of the system or both. By so doing, coherent caches provide data when they have sufficient throughput and are not required to provide data when they do not have insufficient throughput. The choice may be based on a programmable register, an attribute of the initiator request, or identity, clock frequency. Snoop subscription levels, throughput, latency, rate of iniator requests may be monitored. Data responses in snoop or requests to backing store targets may be made, as data may be clean or dirty. |
