发明名称 Cache memory, processor, and production methods for cache memory and processor
摘要 A cache memory built in a processor comprising a plurality of independent memory blocks, pass/fail information memory unit memorizing a presence/absence of a failure occurring in each of the memory blocks, and a screening control function substituting a sound memory block for a failed memory block based on a memory content in the pass/fail information memory unit.
申请公布号 US8694838(B2) 申请公布日期 2014.04.08
申请号 US20100856661 申请日期 2010.08.15
申请人 TONOSAKI MIE;SAKURAI HITOSHI;FUJITSU LIMITED 发明人 TONOSAKI MIE;SAKURAI HITOSHI
分类号 G11C29/00 主分类号 G11C29/00
代理机构 代理人
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