发明名称 Built-in self-test methods, circuits and apparatus for concurrent test of RF modules with a dynamically configurable test structure
摘要 A testable integrated circuit chip (80, 100) includes a functional circuit (80) having modules (IP.i), a storage circuit (110) operable to hold a table representing sets of compatible tests that are compatible for concurrence, and an on-chip test controller (140, 150) coupled with said storage circuit (110) and with said functional circuit modules (IP.i), said test controller (140, 150) operable to dynamically schedule and trigger the tests in those sets, whereby promoting concurrent execution of tests in said functional circuit modules (IP.i). Other circuits, wireless chips, systems, and processes of operation and processes of manufacture are disclosed.
申请公布号 US8694276(B2) 申请公布日期 2014.04.08
申请号 US201113042849 申请日期 2011.03.08
申请人 SONTAKKE ADESH SHARADRAO;MITTAL RAJESH KUMAR;PAREKHJI RUBIN A.;TRIPATHI UPENDRA NARAYAN;TEXAS INSTRUMENTS INCORPORATED 发明人 SONTAKKE ADESH SHARADRAO;MITTAL RAJESH KUMAR;PAREKHJI RUBIN A.;TRIPATHI UPENDRA NARAYAN
分类号 G06F19/00 主分类号 G06F19/00
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