发明名称 Memory controller and operating method of memory controller
摘要 A controller to control a memory system including a memory device. The controlling the memory system may include calculating an error location polynomial in a received read vector with a key equation solving unit of the memory system to read data from the memory device, estimating the number of errors in the received read vector with a control unit of the memory system according to at least one of the calculated error location polynomial and information on the error location polynomial, searching error locations of the received read vector according to the calculated error location polynomial with a chien search unit of the memory system with the control unit. A cycle-per power consumption of the chien search unit may be adjusted with the control unit. A maximum correction time may be adjusted according to the number of errors of the read vector.
申请公布号 US8694858(B2) 申请公布日期 2014.04.08
申请号 US201213467497 申请日期 2012.05.09
申请人 KONG JAEPHIL;CHO YONGWON;SAMSUNG ELECTRONICS CO., LTD. 发明人 KONG JAEPHIL;CHO YONGWON
分类号 G06F11/00;G11C29/00 主分类号 G06F11/00
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