发明名称 MULTI-CHIP MODULE WITH STACKED FACE-DOWN CONNECTED DIES
摘要 A microelectronic assembly can include a substrate having first and second surfaces, at least two logic chips overlying the first surface, and a memory chip having a front surface with contacts thereon, the front surface of the memory chip confronting a rear surface of each logic chip. The substrate can have conductive structure thereon and terminals exposed at the second surface for connection with a component. Signal contacts of each logic chip can be directly electrically connected to signal contacts of the other logic chips through the conductive structure of the substrate for transfer of signals between the logic chips. The logic chips can be adapted to simultaneously execute a set of instructions of a given thread of a process. The contacts of the memory chip can be directly electrically connected to the signal contacts of at least one of the logic chips through the conductive structure of the substrate.
申请公布号 KR20140041496(A) 申请公布日期 2014.04.04
申请号 KR20137031094 申请日期 2012.04.18
申请人 TESSERA, INC. 发明人 HABA BELGACEM;MOHAMMED ILYAS;SAVALIA PIYUSH
分类号 H01L23/12;H01L25/065;H01L25/18 主分类号 H01L23/12
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