发明名称 TRACE BASED MEASUREMENT ARCHITECTURE
摘要 A method for performing trace based measurement for a plurality of CPUs in parallel includes receiving a signal to perform a CPU parallel trace mode and enabling a parallel trace mode multiplexer to output all trace data, representing all data writes to the local memory, to a single observation unit. In one embodiment, the single observation unit is a processor observation block (POB), and in another embodiment, a bus observation block (BOB). If the single observation unit is a BOB, then the parallel trace mode multiplexer first routes the local memory data trace through a BOB adaptation layer to convert the CPU trace output data to data which is understood by the BOB.
申请公布号 US2014095846(A1) 申请公布日期 2014.04.03
申请号 US201213632529 申请日期 2012.10.01
申请人 INFINEON TECHNOLOGIES AG 发明人 MAYER ALBRECHT
分类号 G06F9/30 主分类号 G06F9/30
代理机构 代理人
主权项
地址