发明名称 |
EXPOSING CONTROL OF POWER AND CLOCK GATING FOR SOFTWARE |
摘要 |
A processor includes at least one power domain, each power domain including at least one core that switchably receives power supply from a voltage regulator and switchably receives a clock signal from a clock source, a cache, and at least one control registers having stored thereon data indicating power management states of the at least one power domain and the cache. |
申请公布号 |
US2014095896(A1) |
申请公布日期 |
2014.04.03 |
申请号 |
US201213630738 |
申请日期 |
2012.09.28 |
申请人 |
CARTER NICHOLAS P.;FRYMAN JOSHUA B.;KNAUERHASE ROBERT C.;AGRAWAL ADITYA B.;TORRELLAS JOSEP |
发明人 |
CARTER NICHOLAS P.;FRYMAN JOSHUA B.;KNAUERHASE ROBERT C.;AGRAWAL ADITYA B.;TORRELLAS JOSEP |
分类号 |
G06F1/26 |
主分类号 |
G06F1/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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