| 摘要 |
<p>A receiver apparatus is disclosed. In one aspect, the apparatus includes a receiver interface configured to receive a signal from a transmitter and output an input sequence of M-bit samples. The apparatus also includes a quantizer circuit configured to convert the input sequence of M-bit samples into an output sequence of N-bit samples, wherein M and N are positive integer numbers, and wherein M is greater than N. The apparatus further includes a decoder circuit configured to decode the output sequence of N-bit samples.</p> |
