发明名称 FULLY-DIGITAL BIST FOR RF RECEIVERS
摘要 A built-in receiver self-test system provides on-chip testing with minimal change to the receiver footprint. The system digitally generates a two-tone test signal, and tests the nonlinearities of the receiver using the generated two-tone test signal. To that end, the self-test system comprises a stimulus generator, a downconverter, and a demodulator, all of which are disposed on a common receiver chip. The stimulus generator generates a test signal comprising first and second tones at respective first and second frequencies, where the first and second frequencies are spaced by an offset frequency, and where the first frequency comprises a non-integer multiple of the offset frequency. The downcoverter downconverts the test signal to generate an In-phase component and a Quadrature component. The demodulator measures an amplitude of the intermodulation tone by demodulating the In-phase and Quadrature components based on a reference frequency.
申请公布号 WO2014048743(A1) 申请公布日期 2014.04.03
申请号 WO2013EP68790 申请日期 2013.09.11
申请人 ST-ERICSSON SA 发明人 KUENEN, JEROEN;DHAYNI, ACHRAF
分类号 H04B17/00 主分类号 H04B17/00
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