| 摘要 |
One or more techniques or systems for controlling a supply voltage of a cell are provided herein. Additionally, one or more techniques or systems for mitigating leakage of the cell are provided. In some embodiments, a header circuit is provided, including a first pull-up p-type metal-oxide-semiconductor (PMOS) transistor including a first gate, a first source, and a first drain. Additionally, the header circuit includes a second pull-down PMOS transistor including a second gate, a second source, and a second drain. In some embodiments, the first drain of the first pull-up PMOS transistor is connected to the second source of the second pull-down PMOS transistor and a supply voltage line for one or more cells. In this manner, a pull-down PMOS is configured to control the supply voltage of the cell, thus facilitating voltage control for a write assist, for example. |
