发明名称
摘要 An arithmetic operation apparatus includes: a branch node set detection unit to detect a set of branch nodes for each parallel level; a subtree memory storage area allocation unit to allocate an arithmetic result of a column vector to a memory storage area selected on a basis of a predetermined selection rule from a plurality of memory storage areas; and a node memory storage area allocation unit to allocate an arithmetic result of a column vector to a memory storage area selected on a basis of a predetermined selecting rule from a plurality of memory storage areas.
申请公布号 JP5458621(B2) 申请公布日期 2014.04.02
申请号 JP20090068957 申请日期 2009.03.19
申请人 发明人
分类号 G06F17/12 主分类号 G06F17/12
代理机构 代理人
主权项
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