发明名称 Coherency controller with reduced data buffer
摘要 A coherency controller 10, comprising interfaces for communicating with an initiator 20 and a target 40 and for sending snoops to coherent agents 30, retains data received via snoop responses in a data store 50 comprising buffers. The capacity of the data store is smaller than the volume of pending read data requests. Data buffers may be allocated only for requests that match another pending request. Buffers may be deallocated if all snoops receive responses without accompanying data. Buffers containing clean data may have their data discarded and be reallocated to later requests. When all buffers are full of dirty data, request queues may retain requests corresponding to a pending order. Dirty data may be sent to coherent agents to make buffers available for reallocation. The coherency controller can therefore issue snoops and target requests for a volume of data that exceeds the number of buffers in the data store, reducing the space needed for the data store on the silicon die.
申请公布号 GB2506520(A) 申请公布日期 2014.04.02
申请号 GB20130015343 申请日期 2013.08.29
申请人 ARTERIS SAS 发明人 LAURENT MOLL;JEAN-JACQUES LECLER;JONAH PROUJANSKY-BELL
分类号 G06F12/08 主分类号 G06F12/08
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