发明名称 |
Apparatus and method for reducing the interface resistance in GaN heterojunction FETs |
摘要 |
The interface resistance between the source/drain and gate of an HFET may be significantly reduced by engineering the bandgap of the 2DEG outside a gate region such that the charge density is substantially increased. The resistance may be further reduced by using an n+GaN Cap layer over the channel layer and barrier layer such that a horizontal surface of the barrier layer beyond the gate region is covered by the n+GaN Cap layer. This technique is applicable to depletion and enhancement mode HFETs. |
申请公布号 |
US8686473(B1) |
申请公布日期 |
2014.04.01 |
申请号 |
US20100792529 |
申请日期 |
2010.06.02 |
申请人 |
MICOVIC MIROSLAV;CORRION ANDREA;SHINOHARA KEISUKE;WILLADSEN PETER J;BURNHAM SHAWN D;KAZEMI HOOMAN;HASHIMOTO PAUL B;HRL LABORATORIES, LLC |
发明人 |
MICOVIC MIROSLAV;CORRION ANDREA;SHINOHARA KEISUKE;WILLADSEN PETER J;BURNHAM SHAWN D;KAZEMI HOOMAN;HASHIMOTO PAUL B |
分类号 |
H01L29/15;H01L29/66;H01L31/0256;H01L31/102 |
主分类号 |
H01L29/15 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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