发明名称 |
Chip assembly having via interconnects joined by plating |
摘要 |
An assembly and method of making same are provided. The assembly can be formed by juxtaposing a first electrically conductive element overlying a major surface of a first semiconductor element with an electrically conductive pad exposed at a front surface of a second semiconductor element. An opening can be formed extending through the conductive pad of the second semiconductor element and exposing a surface of the first conductive element. The opening may alternatively be formed extending through the first conductive element. A second electrically conductive element can be formed extending at least within the opening and electrically contacting the conductive pad and the first conductive element. A third semiconductor element can be positioned in a similar manner with respect to the second semiconductor element. |
申请公布号 |
US8685793(B2) |
申请公布日期 |
2014.04.01 |
申请号 |
US20100883421 |
申请日期 |
2010.09.16 |
申请人 |
OGANESIAN VAGE;HABA BELGACEM;MOHAMMED ILYAS;MITCHELL CRAIG;SAVALIA PIYUSH;TESSERA, INC. |
发明人 |
OGANESIAN VAGE;HABA BELGACEM;MOHAMMED ILYAS;MITCHELL CRAIG;SAVALIA PIYUSH |
分类号 |
H01L23/522 |
主分类号 |
H01L23/522 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|