发明名称 |
Multiport memory architecture |
摘要 |
The present disclosure describes techniques and apparatuses for multiport memory architecture. In some aspects serial data is received from a data port and converted to n-bit-wide words of data. The n-bit-wide words of data are then buffered as a k-word-long block of parallel data into a line of a multiline buffer as a block of k*n bits of data. The block of k*n bits of data is then transmitted to a multiport memory via a write bus effective to write the block of k*n bits of data to the multiport memory. |
申请公布号 |
US8688877(B1) |
申请公布日期 |
2014.04.01 |
申请号 |
US201213716481 |
申请日期 |
2012.12.17 |
申请人 |
MARVELL WORLD TRADE LTD. |
发明人 |
LEE WINSTON;SUTARDJA SEHAT;PANNELL DONALD |
分类号 |
G06F7/00;G11C11/41;G06F13/00;G11C7/10 |
主分类号 |
G06F7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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