| 摘要 |
Systems and methods of forming memory cells are described including memory cell topologies with cross-coupled inverters including substantially unidirectional gate conductors. Gate conductors for access transistors may also be provided that are substantially aligned with a long axis of the inverter gate conductor. Additionally, contacts of one inverter in a cross-coupled pair may be disposed substantially aligned with a long axis of the other inverter's gate conductor. Thus, the inverter gate conductors, access transistor gate conductors, and contacts may be formed substantially unidirectionally. Separately formed rectangular active regions may also be disposed orthogonal to the gate conductors across pull up, pull down and access transistors. The separate active regions may be formed such that active regions associated with an access transistor and/or a pull up transistor are noncontiguous with and narrower than, an active region associated with a pull down transistor of the inverter. Thus, 6T SRAM, and similar, memory cell topologies may be provided in which the major components are formed essentially from an array of rectangular lines, including unidirectional gate conductors and contacts, and unidirectional rectangular active regions crossing the gate conductors of the inverters and access transistors. |
