发明名称 CLOCK DOMAIN BOUNDARY CROSSING USING AN ASYNCHRONOUS BUFFER
摘要 An apparatus includes a plurality of channels, where each of the channels includes an asynchronous buffer, a latency determination block, a tap selection circuit, and a variable delay. A latency locator is configured to identify a longest latency from among the channels and is coupled to provide the longest latency to the tap selection circuit of each of the channels. For each of the channels: the latency determination block is coupled to the asynchronous buffer to determine a latency value for the asynchronous buffer; the tap selection circuit is coupled to receive the latency value and the longest latency; the tap selection circuit is coupled to the variable delay; and the tap selection circuit is configured to select a tap of taps of the variable delay responsive to the latency value and the longest latency.
申请公布号 US2014089718(A1) 申请公布日期 2014.03.27
申请号 US201213625108 申请日期 2012.09.24
申请人 XILINX, INC. 发明人 KAIN JULIAN M.
分类号 G06F1/04 主分类号 G06F1/04
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