THERMO/ELECTRICAL CONDUCTOR ARRANGEMENT FOR MULTILAYER PRINTED CIRCUIT BOARDS

摘要

The present invention relates to a thermo/electrical conductor arrangement for multilayer printed circuit boards (PCBs). Using vias for the transport of heat from the interior of the PCB and for conducting high currents between the conducting layers have limitations. Via platings are very thin and vias filled with solder is an unreliable method as there is always a risk that the vias are not properly filled during the soldering process. The present invention overcomes this by inserting a pin of a current conductive material (such as copper) into the via so that the pin is brought into galvanic contact with the conducting layers in the PCB and where at least one end of the pin is freely protruding from the PCB thereby allowing the pin to conduct heat from the interior of the PCB to the protruding end of the pin for external cooling.