| 摘要 |
<p>The present invention belongs to the technical field of simulation of power line carrier communications. Provided are a simulation method and system for a power line carrier communication system. In a simulation model of a sending end and a simulation model of a receiving end which are constructed by the method and system, each of a channel encoding model and a channel decoding model comprises an ARM core chip and a simulation model of a peripheral logic circuit thereof; the sending end comprises a simulation model of an RS error correction encoding algorithm of the ARM core chip; and the receiving end comprises a simulation model of an RS error correction decoding algorithm of the ARM core chip. Because the ARM core chip has a stronger data processing capability and has lower costs than a DSP chip or an FPGA chip generally, combining the RS error correction encoding and decoding algorithms therewith can achieve the operation of RS cyclic error correction codes having a higher error correction capability at low costs, and the RS error correction encoding and decoding algorithms can ensure the stable transmission of power line carrier signals.</p> |
