发明名称 |
Integrated circuit including cross-coupled transistors having gate electrodes formed within at least nine gate level feature layout channels |
摘要 |
A semiconductor device includes a cross-coupled transistor configuration formed by first and second PMOS transistors defined over first and second p-type diffusion regions, and by first and second NMOS transistors defined over first and second n-type diffusion regions, with each diffusion region electrically connected to a common node. Gate electrodes of the PMOS and NMOS transistors are formed by conductive features which extend in only a first parallel direction. At least a portion of the first p-type diffusion region and at least a portion of the second p-type diffusion region are formed over a first common line of extent that extends perpendicular to the first parallel direction. Also, at least a portion of the first n-type diffusion region and at least a portion of the second n-type diffusion region are formed over a second common line of extent that extends perpendicular to the first parallel direction. |
申请公布号 |
US8680583(B2) |
申请公布日期 |
2014.03.25 |
申请号 |
US20100753733 |
申请日期 |
2010.04.02 |
申请人 |
BECKER SCOTT T.;MALI JIM;LAMBERT CAROLE;TELA INNOVATIONS, INC. |
发明人 |
BECKER SCOTT T.;MALI JIM;LAMBERT CAROLE |
分类号 |
H01L27/10 |
主分类号 |
H01L27/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|