发明名称 |
Automated synthesis of high-performance two operand binary parallel prefix adder |
摘要 |
A method for automated synthesis of a parallel prefix device includes determining structural constraints for a given parallel prefix device; generating a plurality of candidate prefix graphs for the parallel prefix device by performing a search of possible prefix graphs meeting the constraints; performing physical synthesis of each of the plurality of candidate prefix graphs to generate performance information for each candidate prefix graph; and determining one or more of the plurality of candidate prefix graphs that meet performance criteria for incorporation into the parallel prefix device. |
申请公布号 |
US8683398(B1) |
申请公布日期 |
2014.03.25 |
申请号 |
US201213686624 |
申请日期 |
2012.11.27 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHOUDHURY MIHIR;PURI RUCHIR;ROY SUBHENDU;SUNDARARAJAN SHARAD C. |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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