发明名称 Integrated circuit optimization
摘要 A device may identify signal channels for connecting circuit blocks, where each circuit block is associated with a block implementation area corresponding to a substrate. The device may assign a channel priority to each of the signal channels based on at least one channel criteria. The device may allocate a channel implementation area, corresponding to the substrate, for each of a plurality of signal channels, based on the channel priority assigned to the signal channel and based on the block implementation areas. The device may generate an integrated circuit design comprising the channel implementation area allocated for each of the plurality of signal channels.
申请公布号 US8683416(B1) 申请公布日期 2014.03.25
申请号 US201113192609 申请日期 2011.07.28
申请人 TRIVEDI VIVEK;SIDDIQUI KHALIL;JUNIPER NETWORKS, INC. 发明人 TRIVEDI VIVEK;SIDDIQUI KHALIL
分类号 G06F17/50 主分类号 G06F17/50
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