发明名称 Method and apparatus for minimizing within-die variations in performance parameters of a processor
摘要 Described herein are a method and an apparatus for minimizing within-die variations in performance parameters of a processor. The apparatus comprising: a reference generator to generate an adjustable compensated reference signal; a bias generator to generate a bias signal based on the adjustable compensated reference signal; a transmitter coupled with the bias generator to transmit an output signal; and a feedback mechanism to sample the output signal from the transmitter and to provide the sampled output signal to the bias generator.
申请公布号 US8683098(B2) 申请公布日期 2014.03.25
申请号 US20100748922 申请日期 2010.03.29
申请人 JOHNSON LUKE A.;SRIKANTH ADHIVEERARAGHAVAN;YUN WENJUN;INTEL CORPORATION 发明人 JOHNSON LUKE A.;SRIKANTH ADHIVEERARAGHAVAN;YUN WENJUN
分类号 G06F3/00;G06F13/00 主分类号 G06F3/00
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