发明名称 Semiconductor memory device
摘要 A main bit line is disposed between a reference main bit line and core main bit lines. A selection transistor disposed between a sub bit line connected to a cell and the main bit line can switch between a conductive state and a non-conductive state independently of other selection transistors. A dummy main bit line can be set to ground potential by a shield grounding section, and can be used as a shield line of the reference main bit line.
申请公布号 US8681565(B2) 申请公布日期 2014.03.25
申请号 US201213709995 申请日期 2012.12.10
申请人 PANASONIC CORPORATION 发明人 UEDA TAKANORI;NAKAYAMA MASAYOSHI;KOUNO KAZUYUKI
分类号 G11C11/34 主分类号 G11C11/34
代理机构 代理人
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