| 摘要 |
A non-volatile memory device includes: a plurality of memory cells (18) and a charge pump (24) coupled with the memory cells. The charge pump can be dynamically reconfigured to provide a first voltage to the memory cells in the bypass mode, provide a first voltage to the memory cells in the program mode, and provide a second voltage which has an opposite polarity to the first voltage in the erase mode. [Reference numerals] (14) Flash memory unit (logical control and registers); (16) Flash analog circuit; (20) Regulators; (22) Bandgap and Iref; (24) Charge pump; (26,28,30,32) Stage; (34) Regulator; (36) Read path (sense amplifiers, decoders, and timing); (AA) Control signals; (BB) Read level, Erase verification level, Program verification level; (CC) High voltage; (DD) Medium voltage; (EE) Negative voltage; (FF) Data input; (GG) Flash array core; (HH) Drain; (II) Data output |
